Initializing Dma - Altera Cyclone V Device Handbook

17-52
Receive Descriptor Field 7 (RDES7)
Receive Descriptor Field 7 (RDES7)
Table 17-20: Receive Descriptor Field 7 (RDES7)
Bit
31:0 RTSH: Receive Frame Timestamp High
This field is updated by DMA with the most significant 32 bits of the timestamp captured
for the corresponding receive frame. This field is updated by DMA only for the last descriptor
of the receive frame which is indicated by Last Descriptor status bit (RDES0[8]) in RDES0.
Related Information
Receive Descriptor Field 0 (RDES0)

Initializing DMA

This section provides the instructions for initializing the DMA/MAC registers in the proper sequence.
Perform the following steps to initialize the DMA:
1. Provide a software reset. This resets all of the EMAC internal registers and logic. (DMA Register 0 (Bus
Mode Register) – bit 0).
2. Wait for the completion of the reset process (poll bit 0 of the DMA Register 0 (Bus Mode Register), which
is only cleared after the reset operation is completed).
3. Poll the bits of Register 11 (AHB or AXI Status) to confirm that all previously initiated (before software-
reset) or ongoing transactions are complete.
Note: If the application cannot poll the register after soft reset (because of performance reasons), then
it is recommended that you continue with the next steps and check this register again (as mentioned
in 12
4. Program the following fields to initialize the Bus Mode Register by setting values in DMA Register 0 (Bus
Mode Register):
• Mixed Burst and AAL
• Fixed burst or undefined burst
• Burst length values and burst mode values
• Descriptor Length (only valid if Ring Mode is used)
• TX and RX DMA Arbitration scheme
5. Program the interface options in Register 10 (AXI Bus Mode Register). If fixed burst-length is enabled,
then select the maximum burst-length possible on the bus (bits[7:1]).
6. Create a proper descriptor chain for transmit and receive. In addition, ensure that the receive descriptors
are owned by DMA (bit 31 of descriptor should be set). When OSF mode is used, at least two descriptors
are required.
7. Make sure that your software creates three or more different transmit or receive descriptors in the chain
before reusing any of the descriptors.
8. Initialize receive and transmit descriptor list address with the base address of the transmit and receive
descriptor (Register 3 (Receive Descriptor List Address Register) and Register 4 (Transmit Descriptor
List Address Register) respectively).
9. Program the following fields to initialize the mode of operation in Register 6 (Operation Mode Register):
Altera Corporation
on page 17-43
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on page 1-53) before triggering the DMA operations.
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2013.12.30