Document Revision History - Altera Cyclone V Device Handbook

CV-52008
2013.11.12
Table 8-8: EDERROR_INJECT instruction
JTAG Instruction
EDERROR_INJECT
You can only inject errors into the first frame of the configuration data. However, you can monitor the error
information at any time. Altera recommends that you reconfigure the FPGA after the test completes.
Automating the Testing Process
You can automate the testing process by creating a Jam
functionality in-system and on-the-fly without reconfiguring the device. You can then switch to the CRC
circuitry to check for real errors caused by an SEU.
Related Information
Test Methodology of Error Detection and Recovery using CRC in Altera FPGA Devices
Provides more information about how to test the error detection block.

Document Revision History

Date
November 2013
May 2013
December 2012
June 2012
October 2011
SEU Mitigation for Cyclone V Devices
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Instruction Code
00 0001 0101
Version
2013.11.12 Updated the CRC Calculation Time section to include a formula to
calculate the minimum and maximum time.
Removed preliminary for the Minimum EMR Update Interval and CRC
Calculation Time.
Removed related information for the Internal Scrubbing feature.
2013.05.06 Added link to the known document issues in the Knowledge Base.
Updated the minimum EMR Update Interval and CRC Calculation
Time for Cyclone V E, Cyclone V GX, and Cyclone V GT devices.
Moved all links to the Related Information section of respective topics
for easy reference.
2012.12.28 Updated the width of the JTAG fault injection and fault injection
registers.
2.0 Added the "Basic Description", "Error Detection Features", "Types of
Error Detection", "Error Detection Components", "Using the Error
Detection Feature", and "Testing the Error Detection Block" sections.
Updated Table 8–4, Table 8–5, and Table 8–6.
Restructured the chapter.
1.0 Initial release.
Document Revision History
Description
Use this instruction to inject errors into the
configuration data. This instruction controls the
JTAG fault injection register, which contains the
error you want to inject into the bitstream.
™
file (.jam). Using this file, you can verify the CRC
Changes
8-9
Altera Corporation