Altera Cyclone V Device Handbook page 896

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cv_54017
2013.12.30
Bit
15
14
13
12:0
Related Information
Buffer Size Calculations
Receive Descriptor Field 2 (RDES2)
Receive Descriptor Field 3 (RDES3)
Receive Descriptor Fields (RDES2) and (RDES3)
Receive Descriptor Field 2 (RDES2)
Table 17-16: Receive Descriptor Field 2 (RDES2)
Bit
31:0
Ethernet Media Access Controller
Send Feedback
RER: Receive End of Ring
When set, this bit indicates that the descriptor list reached its final descriptor. The DMA
returns to the base address of the list, creating a descriptor ring.
RCH: Second Address Chained
When set, this bit indicates that the second address in the descriptor is the Next descriptor
address rather than the second buffer address. When this bit is set, RBS2 (RDES1[28:16])
is a "don't care" value. RDES1[15] takes precedence over RDES1[14].
Reserved
RBS1: Receive Buffer 1 Size
Indicates the first data buffer size in bytes. The buffer size must be a multiple of 4, even if
the value of RDES2 (buffer1 address pointer), in Receive Descriptor Field 2 (RDES2), is not
aligned. When the buffer size is not a multiple of 4, the resulting behavior is undefined. If
this field is 0, the DMA ignores this buffer and uses Buffer 2 or next descriptor depending
on the value of RCH (Bit 14). For more information about calculating buffer sizes, refer to
Buffer Size Calculations.
on page 17-26
Buffer 1 Address Pointer
These bits indicate the physical address of Buffer 1. There are no limitations on the buffer
address alignment except for the following condition: The DMA uses the value programmed
in RDES2[1:0] for its address generation when the RDES2 value is used to store the start
of the frame. The DMA performs a write operation with the RDES2[1:0] bits as 0 during
the transfer of the start of the frame but the frame is shifted as per the actual buffer address
pointer. The DMA ignores RDES2[1:0] if the address pointer is to a buffer where the middle
or last part of the frame is stored. For more information about buffer address alignment,
refer to Host Data Buffer Alignment.
Receive Descriptor Fields (RDES2) and (RDES3)
Description
on page 17-47
on page 17-48
Description
17-47
Altera Corporation

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