Altera Cyclone V Device Handbook page 913

18-6
Application Interface Unit
The CSR is divided into the following groups of registers:
• Global
• Host
• Device
• Power and clock gating
Some registers are shared between host and device modes, because the controller can only be in one mode
at a time. The controller generates a mode mismatch interrupt if a master attempts to access device registers
when the controller is in host mode, or attempts to access host registers when the controller is in device
mode. Writing to unimplemented registers is ignored. Reading from unimplemented registers returns
indeterminate values.
Application Interface Unit
The application interface unit (AIU) generates DMA requests based on programmable FIFO buffer thresholds.
The AIU generates interrupts to the GIC for both host and device modes. A DMA scheduler is included in
the AIU to arbitrate and control the data transfer between packets in system memory and their respective
USB endpoints.
Packet FIFO Controller
The Packet FIFO Controller (PFC) connects the AIU with the MAC through data FIFO buffers located in
the SPRAM. In device mode, one FIFO buffer is implemented for each IN endpoint. In host mode, a single
FIFO buffer stores data for all periodic (isochronous and interrupt) OUT endpoints, and a single FIFO buffer
is used for nonperiodic (control and bulk) OUT endpoints. Host and device mode share a single receive data
FIFO buffer.
SPRAM
An SPRAM implements the data FIFO buffers for host and device modes. The size of the FIFO buffers can
be programmed dynamically.
The SPRAM supports ECCs. ECCs can be enabled through the system manager, by setting the RAM ECC
Enable (en) bit in the USB0 or USB1 RAM ECC Enable Register (usb0 or usb1), in the ECC Management
Register Group (eccgrp). Single-bit and double-bit errors in each USB instance can be injected using this
register.
The SPRAM provides outputs to notify the system manager when single-bit correctable errors are detected
(and corrected), and when double-bit (uncorrectable) errors are detected. The system manager generates
an interrupt to the GIC when an ECC error is detected.
MAC
The MAC module implements the following functionality:
• USB transaction support
• Host protocol support
• Device protocol support
• OTG protocol support
• Link power management (LPM) functions
Altera Corporation
cv_54018
2013.12.30
USB 2.0 OTG Controller
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