Cyclone V Plls; Pll Physical Counters In Cyclone V Devices - Altera Cyclone V Device Handbook

4-16

Cyclone V PLLs

Cyclone V PLLs
PLLs provide robust clock management and synthesis for device clock management, external system clock
management, and high-speed I/O interfaces.
The Cyclone V device family contains fractional PLLs that can function as fractional PLLs or integer PLLs.
The output counters in Cyclone V devices are dedicated to each fractional PLL that support integer or
fractional frequency synthesis.
The Cyclone V devices offer up to 8 fractional PLLs in the larger densities.
Table 4-7: PLL Features in Cyclone V Devices
Integer PLL
Fractional PLL
output counters
C
, , counter sizes
M N C
Dedicated external clock outputs
Dedicated clock input pins
External feedback input pin
Spread-spectrum input clock tracking
Source synchronous compensation
Direct compensation
Normal compensation
Zero-delay buffer compensation
External feedback compensation
LVDS compensation
Phase shift resolution
Programmable duty cycle
Power down mode

PLL Physical Counters in Cyclone V Devices

The physical counters for the fractional PLLs are arranged in the following sequences:
Up-to-down
(5)
Provided input clock jitter is within input jitter tolerance specifications. The modulation frequency of the input
clock is below the PLL bandwidth which is specified in the Fitter report.
(6)
The smallest phase shift is determined by the voltage-controlled oscillator (VCO) period divided by eight. For
degree increments, the Cyclone V device can shift all output frequencies in increments of at least 45°. Smaller
degree increments are possible depending on the frequency and divide parameters.
Altera Corporation
Feature Support
Yes
Yes
9
1 to 512
2 single-ended and 1 differential
4 single-ended or 4 differential
Single-ended or differential
(5)
Yes
Yes
Yes
Yes
Yes
Yes
Yes
(6)
78.125 ps
Yes
Yes
Clock Networks and PLLs in Cyclone V Devices
CV-52004
2014.01.10
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