Altera Cyclone V Device Handbook page 441

TOC-2
Cyclone V Device Handbook Volume 3: Hard Processor System Technical Reference Manual
Contents
Introduction to Cyclone V Hard Processor System (HPS)................................1-1
Features of the HPS......................................................................................................................................1-2
HPS Block Diagram and System Integration...........................................................................................1-3
MPU Subsystem...............................................................................................................................1-4
Interconnect......................................................................................................................................1-4
Memory Controllers........................................................................................................................1-4
Support Peripherals.........................................................................................................................1-7
Interface Peripherals........................................................................................................................1-8
On-Chip Memory..........................................................................................................................1-11
Endian Support..........................................................................................................................................1-11
HPS-FPGA Interfaces................................................................................................................................1-12
HPS Address Map......................................................................................................................................1-12
HPS Address Spaces......................................................................................................................1-12
HPS Peripheral Region Address Map.........................................................................................1-16
Document Revision History.....................................................................................................................1-18
Clock Manager.....................................................................................................2-1
Features of the Clock Manager..................................................................................................................2-1
Clock Manager Block Diagram and System Integration........................................................................2-2
Functional Description of the Clock Manager........................................................................................2-3
Clock Manager Building Blocks.....................................................................................................2-3
Hardware-Managed and Software-Managed Clocks..................................................................2-5
Clock Groups....................................................................................................................................2-5
Flash Controller Clocks.................................................................................................................2-14
Resets...............................................................................................................................................2-15
Safe Mode........................................................................................................................................2-16
Interrupts........................................................................................................................................2-16
Clock Usage By Module................................................................................................................2-16
Clock Manager Address Map and Register Definitions.......................................................................2-22
Document Revision History.....................................................................................................................2-22
Reset Manager.....................................................................................................3-1
Reset Manager Block Diagram and System Integration.........................................................................3-3
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