Altera Cyclone V Device Handbook page 452

Cyclone V Device Handbook Volume 3: Hard Processor System Technical Reference Manual
Interface Pins................................................................................................................................20-12
2
I C Controller Programming Model.....................................................................................................20-13
Slave Mode Operation.................................................................................................................20-13
Master Mode Operation.............................................................................................................20-16
Disabling the I2C Controller......................................................................................................20-17
DMA Controller Operation.......................................................................................................20-17
2
I C Controller Address Map and Register Definitions......................................................................20-21
Document Revision History...................................................................................................................20-21
UART Controller...............................................................................................21-1
UART Controller Features.......................................................................................................................21-1
UART Controller Block Diagram and System Integration..................................................................21-2
Functional Description of the UART Controller..................................................................................21-3
FIFO Buffer Support......................................................................................................................21-3
Automatic Flow Control...............................................................................................................21-3
Clocks..............................................................................................................................................21-5
Resets...............................................................................................................................................21-5
Interrupts........................................................................................................................................21-5
UART Controller Programming Model.................................................................................................21-7
DMA Controller Operation..........................................................................................................21-7
UART Controller Address Map and Register Definitions.................................................................21-10
Document Revision History...................................................................................................................21-11
General-Purpose I/O Interface.........................................................................22-1
Features of the GPIO Interface................................................................................................................22-1
GPIO Interface Block Diagram and System Integration......................................................................22-1
Functional Description of the GPIO Interface......................................................................................22-2
Debounce Operation.....................................................................................................................22-2
Pin Directions.................................................................................................................................22-3
GPIO Interface Programming Model.....................................................................................................22-3
GPIO Interface Address Map and Register Definitions.......................................................................22-3
Document Revision History.....................................................................................................................22-4
Timer Introduction...........................................................................................23-1
Features of the Timer................................................................................................................................23-1
Timer Block Diagram and System Integration......................................................................................23-1
Functional Description of the Timer......................................................................................................23-2
TOC-13
Altera Corporation