Altera Cyclone V Device Handbook page 226

CV-52007
2014.01.10
Figure 7-3: Multiple Device FPP Configuration Using an External Host When Both Devices Receive a Different
Set of Configuration Data
Memory
ADDR DATA[7..0]
External Host
(MAX II Device,
MAX V Device, or
Microprocessor)
When a device completes configuration, its
in the chain. Configuration automatically begins for the second device in one clock cycle.
Using One Configuration Data
To configure multiple Cyclone V devices in a chain using one configuration data, connect the devices to an
external host as shown in the following figure.
Configuration, Design Security, and Remote System Upgrades in Cyclone V Devices
Send Feedback
Connect the resistor to a supply
that provides an acceptable input
signal for the FPGA device.
V must be high enough to
CCPGM
meet the V specification of the
IH
I/O on the device and the external
host. Altera recommends
powering up all configuration
system I/Os with V .
CCPGM
V V
CCPGM CCPGM
FPGA Device Master
10 kΩ 10 kΩ
CONF_DONE
nSTATUS
nCE
GND
DATA[]
nCONFIG
DCLK
Buffers
Connect the repeater buffers between the
FPGA master and slave device for DATA[]
and DCLK for every fourth device.
V
CCPGM
MSEL[4..0]
10 kΩ
nCEO
pin is released low to activate the
nCEO
Using One Configuration Data
For more information, refer to
the MSEL pin settings.
FPGA Device Slave
MSEL[4..0]
CONF_DONE
nSTATUS
nCE nCEO N.C.
You can leave the nCEO pin
DATA[]
unconnected or use it as a user
nCONFIG
I/O pin when it does not feed
another device's nCE pin.
DCLK
pin of the next device
nCE
Altera Corporation
7-11