Altera Cyclone V Device Handbook page 839

Hide thumbs Also See for Cyclone V:
Table of Contents

Advertisement

cv_54016
2013.12.30
DMALP [<LC0>|<LC1>] <loop_iterations>
where:
<loop_iterations>
An 8-bit value that specifies the number of loops to perform.
Note:
For clarity in writing assembler instructions, the 8-bit value is the actual number of iterations of the
loop to be executed. The assembler decrements this by one to create the actual value, 0-255, that the
DMAC uses.
[LC0] If LC0 is present, the DMAC stores <loop_iterations> in the loop counter 0 registers.
[LC1] If LC1 is present, the DMAC stores <loop_iterations> in the loop counter 1 registers.
Note:
If LC0 or LC1 is not present, the assembler determines the loop counter register to use.
DMALPFE
Assembler directive to insert a repetitive loop.
Syntax
DMALPFE
Enables the assembler to clear the nf bit that is present in DMALPEND[S | B].
DMAMOV CCR
Assembler directive that enables you to program the channel control registers using the specified format.
Syntax
DMAMOV CCR,
[SB<1-16>] [SS<8|16|32|64|128>] [SA<I|F>]
[SP<imm3>] [SC<imm4>]
[DB<1-16>] [DS<8|16|32|64|128>] [DA<I|F>]
[DP<imm3>] [DC<imm4>]
[ES<8|16|32|64|128>]
Table 16-4: DMAMOV CCR argument description and the default values
Syntax
SA
Source address increment. Sets the value of
arburst[0]
SS
Source burst size in bits. Sets the value of
arsize[2:0]
SB
Source burst length. Sets the value of arlen[3:0]
DMA Controller
Send Feedback
Description
Options
I = Increment
F = Fixed
8, 16, 32, or 64
1 to 16
16-43
DMALPFE
Default
I
8
1
Altera Corporation

Advertisement

Table of Contents
loading

Table of Contents