Guideline: Implement External Conflict Resolution; Guideline: Customize Read-During-Write Behavior - Altera Cyclone V Device Handbook

CV-52002
2013.05.06

Guideline: Implement External Conflict Resolution

In the true dual-port RAM mode, you can perform two write operations to the same memory location.
However, the memory blocks do not have internal conflict resolution circuitry. To avoid unknown data
being written to the address, implement external conflict resolution logic to the memory block.

Guideline: Customize Read-During-Write Behavior

Customize the read-during-write behavior of the memory blocks to suit your design requirements.
Figure 2-1: Read-During-Write Data Flow
This figure shows the difference between the two types of read-during-write operations available—same
port and mixed port.
Same-Port Read-During-Write Mode
The same-port read-during-write mode applies to a single-port RAM or the same port of a true dual-port
RAM.
Table 2-2: Output Modes for Embedded Memory Blocks in Same-Port Read-During-Write Mode
This table lists the available output modes if you select the embedded memory blocks in the same-port
read-during-write mode.
Output Mode
"new data"
(flow-through)
"don't care"
Embedded Memory Blocks in Cyclone V Devices
Send Feedback
Guideline: Implement External Conflict Resolution
FPGA Device
Port A
data in
Port A
data out
Memory Type
M10K The new data is available on the rising edge of
the same clock cycle on which the new data is
written.
M10K, MLAB The RAM outputs "don't care" values for a
read-during-write operation.
Port B
data in
Mixed-port
data flow
Same-port
data flow
Port B
data out
Description
2-3
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