Altera Cyclone V Device Handbook page 188

6-14
DQS Phase-Shift Circuitry
Figure 6-2: DQS Pins and DLLs in Cyclone V E (A2 and A4) Devices
DQS
Pin
DQS
Pin
DQS
Pin
DQS
Pin
Altera Corporation
DQS
Pin
DLL
Reference
Clock
Δt
DLL to
IOE
DQS Logic
Blocks
to
Δt
IOE
to
Δt
IOE
to
Δt
IOE
to
Δt
IOE
to
DLL
IOE
Δt
DLL
Reference
Clock
DQS
Pin
DQS DQS DQS
Pin Pin Pin
DQS Logic
Blocks
Δt Δt Δt
to to to
IOE IOE IOE
to to to
IOE IOE IOE
Δt Δt Δt
DQS Logic
Blocks
DQS DQS DQS
Pin Pin Pin
External Memory Interfaces in Cyclone V Devices
DLL
Reference
Clock
DLL
DQS Logic
Blocks
to
DQS
Δt
IOE
Pin
to
DQS
Δt
IOE
Pin
to
DQS
Δt
IOE
Pin
to
DQS
Δt
IOE
Pin
DLL
DLL
Reference
Clock
Send Feedback
CV-52006
2014.01.10