Altera Cyclone V Device Handbook page 284

TOC-2
Cyclone V Device Handbook Volume 2: Transceivers
Contents
Transceiver Architecture in Cyclone V Devices.................................................1-1
Architecture Overview................................................................................................................................1-2
Transceiver Banks............................................................................................................................1-3
6.144 Gbps CPRI Support Capability in GT Devices..................................................................1-8
Transceiver Channel Architecture.................................................................................................1-8
PMA Architecture........................................................................................................................................1-9
Transmitter PMA Datapath.........................................................................................................1-10
Receiver PMA Datapath................................................................................................................1-15
Transmitter PLL.............................................................................................................................1-20
Clock Divider..................................................................................................................................1-24
Calibration Block...........................................................................................................................1-25
PCS Architecture........................................................................................................................................1-27
Transmitter PCS Datapath...........................................................................................................1-28
Receiver PCS Datapath..................................................................................................................1-34
Channel Bonding.......................................................................................................................................1-49
PLL Sharing................................................................................................................................................1-49
Document Revision History.....................................................................................................................1-49
Transceiver Clocking in Cyclone V Devices.......................................................2-1
Input Reference Clocking...........................................................................................................................2-1
Dedicated Reference Clock Pins....................................................................................................2-2
Fractional PLL (fPLL)......................................................................................................................2-4
Internal Clocking.........................................................................................................................................2-5
Transmitter Clock Network...........................................................................................................2-5
Transmitter Clocking......................................................................................................................2-9
Receiver Clocking..........................................................................................................................2-14
FPGA Fabric Transceiver Interface Clocking.......................................................................................2-18
Transceiver Datapath Interface Clocking...................................................................................2-21
Transmitter Datapath Interface Clocking..................................................................................2-21
Receiver Datapath Interface Clock..............................................................................................2-25
Document Revision History.....................................................................................................................2-28
Transceiver Reset Control in Cyclone V Devices...............................................3-1
Altera Corporation