Altera Cyclone V Device Handbook page 836

16-40
DMASTZ
DMASTP<S|B> <peripheral>
where:
<S> Sets bs to 0. This instructs the DMAC to perform:
• A single DMA store operation if request_type is programmed to Single
• The DMAC ignores the state of the dst_burst_len field in the channel control registers and always performs
an AXI transfer with a burst length of one.
• A DMANOP if request_type is programmed to Burst.
<B> Sets bs to 1. This instructs the DMAC to perform:
• The DMA store if request_type is programmed to Burst
• A DMANOP if request_type is programmed to Single.
<peripheral> 5-bit immediate, value 0-31.
Note: The DMAC sets the value of the request_type flag when it executes a DMAWFP instruction.
Operation
You can only use this instruction in a DMA channel thread.
The DMAC only commences the burst when the MFIFO buffer contains all of the data necessary to complete
the burst transfer.
Related Information
DMAWFP on page 16-41
DMASTZ
Store Zero instructs the DMAC to store zeros, using AXI transactions that the destination address registers
and channel control registers specify. If the dst_inc bit in the channel control registers is set to
incrementing, the DMAC updates the destination address registers after it executes DMASTZ.
Figure 16-21: DMASTZ Instruction Encoding
Assembler syntax
DMASTZ
Operation
You can only use this instruction in a DMA channel thread.
DMAWFE
Wait For Event instructs the DMAC to halt execution of the thread until the event, that <event_num>
specifies, occurs. When the event occurs, the thread moves to the Executing state and the DMAC clears the
event.
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DMA Controller
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