Altera Cyclone V Device Handbook page 351

CV-53002
2013.05.06
Table 2-7: Clock Path for Bonded Configurations
Clock Line
x6, xN
Figure 2-11: Four Bonded Transmitter Channels Driven by CMU PLL using x6 and xN Clock Line Across
Multiple Transceiver Banks
(8)
Bonded channels within the neighboring two banks or within the six channels of TX PLL are driven by
clocks from x6 clock line. Channels in other banks outside the 6 channels are driven by the xN clock line.
Transceiver Clocking in Cyclone V Devices
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Transmitter PLL
CMU
TX PMA Ch0
xN_top x6_bot x6_top
TX PMA Ch5
x6_bot x6_top
TX PMA Ch4
TX PMA Ch3
xN_top Channels 0, 1, 2
Bonded Channel Configurations
CMU PLL » central clock divider » x6 » xN » serializer
TX PCS Ch0
Local Clock Divider
Clock Divider
TX PCS Ch5
Local Clock Divider
Clock Divider
TX PCS Ch4
Central Clock Divider
Clock Divider
TX PCS Ch3
Local Clock Divider
Clock Divider
Both Parallel and Serial Clocks
Serial Clock
Parallel Clock
Clock Path
CMU PLL
CMU PLL
CMU PLL
CMU PLL
Data Path
Unused Resources
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(8)