Altera Cyclone V Device Handbook page 815

cv_54016
2013.12.30
DMA Manager Thread in Secure State
If the DNS bit is 0, the DMA manager thread operates in the Secure state and performs only secure instruction
fetches. When a DMA manager thread in the Secure state processes:
• DMAGO The DMAC uses the status of the ns bit, to set the security state of the DMA channel thread
by writing to the CNS bit for that channel.
• DMAWFE The DMAC halts execution of the thread until the event occurs. When the event occurs, the
DMAC continues execution of the thread, irrespective of the security state of the corresponding INS bit.
• DMASEV The DMAC sets the corresponding bit in the INT_EVENT_RIS register, irrespective of the
security state of the corresponding INS bit.
DMA Manager Thread in Non-Secure State
If the DNS bit is 1, the DMA manager thread operates in the Non-secure state, and it only performs non-
secure instruction fetches. When a DMA manager thread in the Non-secure state processes:
• DMAGO The DMAC uses the status of the ns bit, to control if it starts a DMA channel thread.
• If ns = 0 The DMAC does not start a DMA channel thread and instead it:
• Executes an NOP.
• Sets the FSRD register.
• Sets the dmago_err bit in the FTRD register.
• Moves the DMA manager to the Faulting state.
• If ns = 1 The DMAC starts a DMA channel thread in the Non-secure state and programs the CNS
bit to be non-secure.
• DMAWFE The DMAC uses the status of the corresponding INS bit, in the CR3 register, to control
whether it waits for the event.
• If INS = 0 The event is in the Secure state. The DMAC:
• Executes an NOP.
• Sets the FSRD register.
• Sets the mgr_evnt_err bit in the FTRD register.
• Moves the DMA manager to the Faulting state.
• If INS = 1 The event is in the Non-secure state. The DMAC halts execution of the thread and waits
for the event to occur.
• DMASEV The DMAC uses the status of the corresponding INS bit, in the CR3 register, to control if it
creates the event interrupt.
• If INS = 0 The event-interrupt resource is in the Secure state. The DMAC:
• Executes a NOP.
• Sets the FSRD register.
• Sets the mgr_evnt_err bit in the FTRD register.
• Moves the DMA manager to the Faulting state.
• If INS = 1 The event-interrupt resource is in the Non-secure state. The DMAC creates the event
interrupt.
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DMA Manager Thread in Secure State
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