Altera Cyclone V Device Handbook page 527

4-16
Interconnect Slave Properties
Table 4-5: Interconnect Slave Interfaces
Acceptance is based on the number of read, write, and total transactions. The FIFO buffer depth for AXI is based
on the AW, AR, R, W, and B channels. For AHB and APB, the depth is based on the W, A, and D channels.
Slave
SDRAM subsystem
CSR
SP timer 0/1
I2C 0/1/2/3
UART 0/1
CAN 0/1
GPIO 0/1/2
ACP ID mapper CSR
FPGA manager CSR
DAP CSR
Quad SPI flash CSR
SD/MMC CSR
EMAC 0/1 CSR
System manager
OSC1 timer 0/1
Watchdog 0/1
Clock manager
Reset manager
DMA secure CSR
DMA nonsecure CSR
SPI slave 0/1
Scan manager
SPI master 0/1
Lightweight HPS-to-
FPGA bridge
USB OTG 0/1
Altera Corporation
Interface Clock
Width
32
l4_sp_clk
32
l4_sp_clk
32
l4_sp_clk
32
l4_sp_clk
32
l4_sp_clk
32
l4_mp_clk
32
l4_mp_clk
32
l4_mp_clk
32
l4_mp_clk
32
l4_mp_clk
32
l4_mp_clk
32
l4_mp_clk
32
osc1_clk
32
osc1_clk
32
osc1_clk
32
osc1_clk
32
osc1_clk
32
l4_main_clk
32
l4_main_clk
32
l4_main_clk
32
spi_m_clk
32
spi_m_clk
32
l4_main_clk
32
usb_mp_clk
Mastered By Acceptance
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 SP bus master 1, 1, 1
L4 OSC1 bus master 1, 1, 1
L4 OSC1 bus master 1, 1, 1
L4 OSC1 bus master 1, 1, 1
L4 OSC1 bus master 1, 1, 1
L4 OSC1 bus master 1, 1, 1
L4 main bus master 1, 1, 1
L4 main bus master 1, 1, 1
L4 main bus master 1, 1, 1
L4 main bus master 1, 1, 1
L4 main bus master 1, 1, 1
L3 slave peripheral 16, 16, 32
switch
L3 slave peripheral 1, 1, 1
switch
cv_54004
2013.12.30
Buffer Interface
Depth Type
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2 APB
2, 2, 2, 2, 2 AXI
2, 2, 2 AHB
Interconnect
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