Altera Cyclone V Device Handbook page 451

TOC-12
Cyclone V Device Handbook Volume 3: Hard Processor System Technical Reference Manual
SPI Controller....................................................................................................19-1
Features of the SPI Controller..................................................................................................................19-1
SPI Block Diagram and System Integration...........................................................................................19-1
Functional Description of the SPI Controller........................................................................................19-2
SPI Programming Model........................................................................................................................19-17
SPI Controller Address Map and Register Definitions......................................................................19-27
Document Revision History...................................................................................................................19-28
2
I C Controller....................................................................................................20-1
Features of the I
2
I C Controller Block Diagram and System Integration.......................................................................20-2
Functional Description of the I
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SPI Block Diagram.........................................................................................................................19-2
Protocol Details and Standards Compliance.............................................................................19-2
SPI Controller Overview...............................................................................................................19-3
Transfer Modes..............................................................................................................................19-6
SPI Master.......................................................................................................................................19-7
SPI Slave........................................................................................................................................19-10
Partner Connection Interfaces...................................................................................................19-12
DMA Controller Interface..........................................................................................................19-16
Slave Interface...............................................................................................................................19-16
Clocks and Resets.........................................................................................................................19-16
Master SPI and SSP Serial Transfers.........................................................................................19-18
Master Microwire Serial Transfers............................................................................................19-20
Slave SPI and SSP Serial Transfers............................................................................................19-22
Slave Microwire Serial Transfers...............................................................................................19-23
Software Control for Slave Selection.........................................................................................19-23
DMA Controller Operation.......................................................................................................19-24
2
C Controller..................................................................................................................20-1
Feature Usage.................................................................................................................................20-3
Behavior...........................................................................................................................................20-3
Protocol Details..............................................................................................................................20-4
Multiple Master Arbitration.........................................................................................................20-8
Clock Frequency Configuration................................................................................................20-10
SDA Hold Time............................................................................................................................20-11
DMA Controller Interface..........................................................................................................20-12
Clocks............................................................................................................................................20-12
Resets.............................................................................................................................................20-12
2
C Controller........................................................................................20-3