Hps-Fpga Axi Bridges; Features Of The Axi Bridges - Altera Cyclone V Device Handbook

2013.12.30
cv_54005 Subscribe
This chapter describes the bridges in the hard processor system (HPS) used to communicate data between
the FPGA fabric and HPS logic. The bridges use the Advanced Microcontroller Bus Architecture (AMBA)
Advanced eXtensible Interface (AXI) protocol, and are based on the AMBA Network Interconnect (NIC-301).
The HPS contains the following HPS-FPGA AXI bridges:
• FPGA-to-HPS Bridge
• HPS-to-FPGA Bridge
• Lightweight HPS-to-FPGA Bridge
Related Information
• FPGA-to-HPS Bridge
• HPS-to-FPGA Bridge
• Lightweight HPS-to-FPGA Bridge
• Info center
Additional information is available in the AMBA AXI Protocol Specification v1.0 and the AMBA Network
Interconnect (NIC-301) Technical Reference Manual, which you can download from the ARM info
center website.

Features of the AXI Bridges

The HPS-FPGA AXI bridges allow masters in the FPGA fabric to communicate with slaves in the HPS logic
and vice versa. For example, you can instantiate additional memories or peripherals in the FPGA fabric, and
master interfaces belonging to components in the HPS logic can access them. You can also instantiate
components such as a Nios
or peripherals in the HPS logic.
Table 5-1: AXI Bridge Features
Feature
Supports the AMBA AXI3 interface protocol
2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words
and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other
words and logos identified as trademarks or service marks are the property of their respective holders as described at
www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with
Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes
no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly
agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published
information and before placing orders for products or services.
www.altera.com
101 Innovation Drive, San Jose, CA 95134
Send Feedback
on page 5-3
on page 5-13
on page 5-14
®
II processor in the FPGA fabric and their master interfaces can access memories
FPGA-to-HPS

HPS-FPGA AXI Bridges

HPS-to-FPGA
Bridge Bridge
Y Y
5
Lightweight HPS-to-FPGA
Bridge
Y
ISO
9001:2008
Registered