7-14
CTI Trigger Connections to Outside the Debug System
h2f_tpiu_clock
CTI Trigger Connections to Outside the Debug System
The following CTIs in the HPS debug system connect to outside the debug system:
• csCTI
• FPGA-CTI
csCTI
This section lists the trigger input, output, and output acknowledge pin connections implemented for csCTI
in the debug system. The trigger input acknowledge signals are not connected to pins.
Table 7-8: csCTI Trigger Input Signals
The following table lists the trigger input pin connections implemented for csCTI.
Number
7
ASYNCOUT
6
TRIGOUTHETE
5
TRIGOUTSW
4
TRIGOUTSPTE
3
ACQCOMP
2
FULL
1
ACQCOMP
0
FULL
Table 7-9: csCTI Trigger Output Signals
The following table lists the trigger output pin connections implemented for csCTI.
Number
7
TRIGIN
6
FLUSHIN
5
HWEVENTS[3:2]
4
HWEVENTS[1:0]
3
TRIGIN
2
FLUSHIN
1
TRIGIN
Altera Corporation
Signal
Signal
Signal
Clock output from TPIU
STM
STM
STM
STM
ETR
ETR
ETF
ETF
Destination
ETF
ETF
STM
STM
TPIU
TPIU
ETR
Description
Source
CoreSight Debug and Trace
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cv_54007
2013.12.30