Debug Resets - Altera Cyclone V Device Handbook

cv_54007
2013.12.30
Port Name
HCLK
PCLKSYS
SWCLKTCK
TRACECLKIN
Related Information
Info center
For more information about the CoreSight port names, refer to the CoreSight Technology System Design
Guide, which you can download from the ARM info center website.

Debug Resets

The CoreSight system uses several resets. Port Name is the name of the clock signal inputs described for
individual CoreSight debug components in the ARM documentation. Signal Name is the name of the clock
signal used with other HPS components.
Table 7-12: CoreSight Resets
Port Name
ATRESETn
nCTIRESET
DAPRESETn
PRESETDBGn
HRESETn
PRESETSYSn
CoreSight Debug and Trace
Send Feedback
Clock Source
Clock
manager
Clock
manager
JTAG
interface
FPGA fabric
Clock
manager
Clock Source Signal Name
Reset manager
dbg_rst_n
Reset manager
dbg_rst_n
Reset manager
dbg_rst_n
Reset manager
dbg_rst_n
Reset manager
sys_dbg_rst_
n
Reset manager
sys_dbg_rst_
n
Signal Name
Used by the AHB-Lite master inside the
dbg_clk
DAP. It is asynchronous to DAPCLK. In the
HPS, the AHB-Lite port uses same clock as
DAPCLK.
Used by the APB slave port inside the DAP.
l4_mp_clk
It is asynchronous to DAPCLK.
The SWJ-DP clock driven by the external
dap_tck
debugger through either the JTAG interface
or the FPGA fabric. It is asynchronous to
tpiu_
DAPCLK. When through the JTAG
traceclkin
interface, this clock is the same as TCK of
the JTAG interface.
TPIU trace clock input. It is asynchronous
dbg_trace_
to ATCLK. In the HPS, this clock can come
clk
from the clock manager or the FPGA fabric.
Trace bus reset. It resets all registers in ATCLK
domain.
CTI reset signal. It resets all registers in CTICLK
domain. In the HPS, there are four instances of CTI.
All four use the same reset signal.
DAP internal reset. It is connected to PRESETDBGn.
Debug APB reset. Resets all registers clocked by
PCLKDBG.
SoC-provided reset signal that resets all of the AMBA
on-chip interconnect. Use this signal to reset the DAP
AHB-Lite master port.
Resets system APB slave port of DAP.
Debug Resets
Description
Description
Altera Corporation
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