Altera Cyclone V Device Handbook page 91

4-34
Automatic Switchover with Manual Override
difference is within 20%, the clock sense block detects when a clock stops toggling. However, the PLL may
lose lock after the switchover is completed and needs time to relock.
Note: Altera recommends resetting the PLL using the
between the PLL input and output clocks when using clock switchover.
Figure 4-34: Automatic Switchover After Loss of Clock Detection
This figure shows an example waveform of the switchover feature in automatic switchover mode. In this
example, the
inclk0
cycles, the clock sense circuitry drives the
toggling, the switchover state machine controls the multiplexer through the
the backup clock,
Automatic Switchover with Manual Override
In automatic switchover with manual override mode, you can use the
controlled switch conditions. You can use this mode for same-frequency switchover, or to switch between
inputs of different frequencies.
For example, if
signal. The automatic clock-sense circuitry cannot monitor clock input (
with a frequency difference of more than 100% (2×).
This feature is useful when the clock sources originate from multiple cards on the backplane, requiring a
system-controlled switchover between the frequencies of operation.
You must choose the backup clock frequency and set the
within the recommended operating frequency range. The ALTERA_PLL MegaWizard Plug-in Manager
notifies you if a given combination of
Altera Corporation
signal is stuck low. After the
.
inclk1
inclk0
inclk1
muxout
clkbad0
clkbad1
activeclock
is 66 MHz and
inclk0 inclk1
inclk0
signal to maintain the phase relationships
areset
signal is stuck at low for approximately two clock
inclk0
signal high. Since the reference clock signal is not
clkbad[0]
Switchover is enabled on the falling
edge of inclk0 or inclk1, depending
on which clock is available. In this
figure, switchover is enabled on the
falling edge of inclk1.
is 200 MHz, you must control switchover using the
, , , and
M N C
and frequencies cannot meet this requirement.
inclk1
Clock Networks and PLLs in Cyclone V Devices
signal to switch to
clkswitch
signal for user- or system-
clkswitch
and ) frequencies
inclk0 inclk1
counters so that the VCO operates
K
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2014.01.10
clkswitch