Altera Cyclone V Device Handbook page 729

cv_54011
2013.12.30
ATA Task File Transfer Using the RW_MULTIPLE_REGISTER (RW_REG) Command
This command involves data transfer between the CE-ATA card device and the controller. To send a data
command, the controller needs a command argument, total data size, and block size. Software receives or
sends data through the FIFO buffer.
Implementing ATA Task File Transfer
To implement an ATA task file transfer (read or write), perform the following steps:
1. Write the data size in bytes to the bytcnt register. bytcnt must equal the block size, because the
controller expects a single block transfer.
2. Write the block size in bytes to the blksiz register.
3. Write the cmdarg register with the beginning register address.
You must set the cmdarg, cmd, blksiz, and bytcnt registers according to the tables in Register Settings
for ATA Task File Transfer.
Related Information
Register Settings for ATA Task File Transfer
Refer to this table for information on how to set these registers.
Register Settings for ATA Task File Transfer
Table 11-23: cmdarg Register Settings for ATA Task File Transfer
Bit
31
30:24
23:18
17:16
15:8
7:2
1:0
Table 11-24: cmd Register Settings for ATA Task File Transfer
Bit
start_cmd
ccs_expected
read_ceata_device
update_clk_regs_only
card_num
SD/MMC Controller
Send Feedback
ATA Task File Transfer Using the RW_MULTIPLE_REGISTER (RW_REG) Command
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†
Value
1 or 0 Set to 0 for read operation or set to 1 for write operation
0 Reserved (bits set to 0 by host processor)
0 Starting register address for read or write (DWORD aligned)
0 Register address (DWORD aligned)
0 Reserved (bits set to 0 by host processor)
16 Number of bytes to read or write (integral number of DWORD)
0 Byte count in integral number of DWORD
Value
1
0
0 or 1
0
0
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on page 11-51
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Comment
†
CCS is not expected
Set to 1 if RW_BLK or RW_REG read
No clock parameters update command
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Comment
Altera Corporation
11-51