Altera Cyclone V Device Handbook page 741

cv_54011
2013.12.30
• Set up the descriptors as described in Internal DMA Controller Transmission Sequences and Internal
DMA Controller Reception Sequences".
• Set the use_internal_dmac bit of the ctrl register to 1.
4. Set the card device frequency to 400 kHz using the clkdiv registers. For more information, refer to
Clock Setup.
5. Set the data_timeout field of the tmout register equal to the card device total access time, N
6. Set the blksiz register to 0x200 (512 bytes).
7. Set the bytcnt register to a multiple of 128 KB, as indicated by the BOOT_SIZE_MULT value in the
card device.
8. Set the rx_wmark field in the fifoth register. Typically, the threshold value can be set to 512, which
is half the FIFO buffer depth.
9. Set the following fields in the cmd register:
• Initiate the command by setting start_cmd = 1
• Enable boot (enable_boot) = 1
• Expect boot acknowledge (expect_boot_ack):
• If a start-acknowledge pattern is expected from the card device, set expect_boot_ack to 1.
• If a start-acknowledge pattern is not expected from the card device, set expect_boot_ack to
0.
• Card number (card_number) = 0
• data_expected = 1
• Reset the remainder of cmd register bits to 0
10. If no start-acknowledge pattern is expected from the card device (expect_boot_ack set to 0) proceed
to step
11. This step handles the case where a start-acknowledge pattern is expected (expect_boot_ack was set
to 1 in
a. If the Boot ACK Received interrupt is not received from the controller within 50 ms of initiating the
command
• start_cmd = 1
• Disable boot (disable_boot)= 1
• card_number = 0
• All other fields = 0
The controller generates a Command Done interrupt after deasserting the CMD pin of the card
interface.
If internal DMA controller mode is used for the boot process, the controller performs the following
steps after the Boot ACK Received timeout:
• The DMA descriptor is closed.
• The ces bit in the idsts register is set, indicating the Boot ACK Received timeout.
• The ri bit of the idsts register is not set.
b. If the Boot ACK Received interrupt is received, the software driver must clear this interrupt by writing
1 to the ces bit in the idsts register.
Within 0.95 seconds of the Boot ACK Received interrupt, the Boot Data Start interrupt must be
received from the controller. If this does not occur, the software driver must write the following cmd
register fields:
SD/MMC Controller
Send Feedback
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step 9).
(step 9), the software driver must set the following cmd register fields:
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Boot Operation for eMMC Card Device
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Altera Corporation
11-63
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