Altera Cyclone V Device Handbook page 873

17-24
Descriptor Lists and Data Buffers
Figure 17-5: Descriptor Ring Structure
Figure 17-6: Descriptor Chain Structure
Note: You can select a descriptor structure during RTL configuration. The control bits in the descriptor
structure are assigned so that the application can use an 8 KB buffer. All descriptions refer to the
default descriptor structure.
Related Information
• Descriptors
Detailed bit map of the descriptor structure
• Ethernet MAC Address Map and Register Definitions
Information about Control and Status registers
Altera Corporation
†
Next Descriptor
on page 17-36
Buffer 1 Buffer 1
Descriptor 0 Descriptor 0
Buffer 1 Buffer 2
Buffer 1
Descriptor 1
Buffer 2
Buffer 1
Descriptor 2
Buffer 2
Buffer 1
Descriptor n
Buffer 2
Buffer 1
Descriptor 0
Buffer 1
Descriptor 1
Buffer 1
Descriptor 2
on page 17-58
Ethernet Media Access Controller
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2013.12.30