Types Of Clock Networks - Altera Cyclone V Device Handbook

CV-52004
2014.01.10
Clock Resource
PCLK networks
For more information about the clock input pins connections, refer to the pin connection guidelines.
Related Information
Cyclone V Device Family Pin Connection Guidelines

Types of Clock Networks

Global Clock Networks
Cyclone V devices provide GCLKs that can drive throughout the device. The GCLKs serve as low-skew clock
sources for functional blocks, such as adaptive logic modules (ALMs), digital signal processing (DSP),
embedded memory, and PLLs. Cyclone V I/O elements (IOEs) and internal logic can also drive GCLKs to
create internally-generated global clocks and other high fan-out control signals, such as synchronous or
asynchronous clear and clock enable signals.
Clock Networks and PLLs in Cyclone V Devices
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Device
Cyclone V E A2 and A4
Cyclone V GX C3
Cyclone V E A5
Cyclone V GX C4and
C5
Cyclone V GT D5
Cyclone V SE A2 and
A4
Cyclone V SX C2 and
C4
Cyclone V E A7
Cyclone V GX C7
Cyclone V GT D7
Cyclone V SE A5 and
A6
Cyclone V SX C5 and
C6
Cyclone V ST D5 and
D6
Cyclone V E A9
Cyclone V GX C9
Cyclone V GT D9
Number of Resources
Available
6
12
PLD-transceiver interface clocks,
I/O pins, and logic array
18
24
Types of Clock Networks
Source of Clock Resource
—
Altera Corporation
4-3