Altera Cyclone V Device Handbook page 215

CV-52006
2014.01.10
Date
June 2012
February 2012
November 2011
October 2011
External Memory Interfaces in Cyclone V Devices
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Version
2.0 Updated for the Quartus II software v12.0 release:
Restructured chapter.
Updated "Design Considerations", "DQS Postamble Circuitry", and
"IOE Registers"sections.
Added SoC devices information.
Added Figure 6–5, Figure 6–10, and Figure 6–21.
1.2 Updated Figure 6–20.
Minor text edits.
1.1 Updated Table 6–2.
Added Figure 6–2.
1.0 Initial release.
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