Altera Cyclone V Device Handbook page 350

2-12
Bonded Channel Configurations
Figure 2-10: Three Non-Bonded Transmitter Channels Driven by CMU PLL using x6 and xN Clock Lines Across
Multiple Transceiver Banks
Bonded Channel Configurations
This section describes the clock path for bonded configurations.
The following table describes the clock path for bonded configurations with the CMU PLL as TX PLL using
various clock lines.
Altera Corporation
TX PMA Ch0
xN_top x6_bot x6_top
TX PMA Ch5
x6_bot x6_top
TX PMA Ch4
TX PMA Ch3
xN_top Channels 0, 1, 2
TX PCS Ch0
Local Clock Divider
Clock Divider
TX PCS Ch5
Local Clock Divider
Clock Divider
TX PCS Ch4
Central Clock Divider
Clock Divider
TX PCS Ch3
Local Clock Divider
Clock Divider
Both Parallel and Serial Clocks
Serial Clock
Parallel Clock
Transceiver Clocking in Cyclone V Devices
2013.05.06
CMU PLL
CMU PLL
CMU PLL
CMU PLL
Data Path
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