Altera Cyclone V Device Handbook page 556

6-10
The MPCore Address Map
The MPCore Address Map
Addresses Are Not To Scale
0xFFFF FFFF
0xFC00 0000
0xC000 0000 (3 GB)
0x8000 0000 (2 GB)
0x4000 0000 (1 GB)
0x0010 0000 (1 MB)
The SDRAM Region
The SDRAM region starts at address 0x100000 (1 MB). The top of the region is determined by the L2
cache filter.
The L2 cache contains a filtering mechanism that routes accesses to the SDRAM and L3 interconnect. The
filter defines a filter range with start and end addresses. Any access within this filter range is routed to the
SDRAM subsystem. Accesses outside of this filter range are routed to the L3 interconnect.
The start and end addresses are specified in the following register fields:
• reg12_addr_filtering_start.address_filtering_start
• reg12_address_filtering_end.address_filtering_end
To remap the lower 1MB of SDRAM into the boot region, set the filter start address to 0x0 to ensure accesses
between 0x0 and 0xFFFFF are routed to the SDRAM. Independently, you can set the filter end address in
1 MB increments above 0xC0000000 to extend the upper bounds of the SDRAM region. However, you
achieve this extended range at the expense of the FPGA peripheral address span. Depending on the address
filter settings in the L2 cache, the top of the SDRAM region can range from 0xBFFFFFFF to 0xFBFFFFFF.
Related Information
L2 Cache on page 6-28
The FPGA Slaves Region
The Cortex-A9 MPU subsystem supports the variable-sized FPGA slaves region to communicate with FPGA-
based peripherals. This region can start as low as 0xC0000000, depending on the L2 cache filter settings.
The top of the FPGA slaves region is located at 0xFBFFFFFF. As a result, the size of the FPGA slaves region
can range from 0 to 0x3F000000 bytes.
Altera Corporation
HPS Peripherals (64 MB)
HPS-to-FPGA
(FPGA-Based Peripherals)
SDRAM
Boot Region
0
L2 Cache Filtering
Mapping Options
On-Chip RAM (64 KB)
Boot ROM (64 KB)
SDRAM (1 MB)
(Mapping Provided by
L2 Cache Filtering)
Cortex-A9 Microprocessor Unit Subsystem
cv_54006
2013.12.30
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