Altera Cyclone V Device Handbook page 821

cv_54016
2013.12.30
When a discontinuity in the source data stream occurs, the DMAC:
1. Halts execution of the DMA channel thread.
2. Completes all outstanding read operations for the channel. That is, as if the DMAC were executing
DMARMB
3. Resumes execution of the DMA channel thread. No data is discarded from the MFIFO buffer.
Resource Sharing Between DMA Channels
DMA channel programs share the MFIFO buffer data storage resource. You must not start a set of
concurrently running DMA channel programs with a resource requirement that exceeds 512, the size of the
MFIFO buffer. If you exceed this limit then the DMAC might lock up and generate a Watchdog abort, refer
to "Watchdog Abort".
The DMAC includes a mechanism called the load lock to ensure that the shared MFIFO buffer resource is
used correctly. The load-lock is either owned by one channel, or it is free. The channel that owns the load-
lock can execute DMALD instructions successfully. A channel that does not own the load-lock pauses at a
DMALD instruction until it takes ownership of the load-lock.
A channel claims ownership of the load lock when:
• It executes a DMALD or DMALDP instruction
• No other channel currently owns the load-lock.
A channel releases ownership of the load-lock when any of the following occur:
• It executes a DMAST, DMASTP, or DMASTZ
• It reaches a barrier, that is, it executes DMARMB or DMAWMB
• It waits, that is, it executes DMAWFP or DMAWFE
• It terminates normally, that is, it executes DMAEND
• It aborts for any reason, including DMAKILL.
The MFIFO buffer resource usage of a DMA channel program is measured in MFIFO buffer entries, and
rises and falls as the program proceeds. The MFIFO buffer resource requirement of a DMA channel program
is described using a static requirement and a dynamic requirement which are affected by the load-lock
mechanism.
The static requirement is defined to be the maximum number of MFIFO buffer entries that a channel is
currently using before that channel does one of the following:
• Executes a WFP or WFE instruction
• Claims ownership of the load-lock.
The dynamic requirement is defined to be the difference between the static requirement and the maximum
number of MFIFO buffer entries that a channel program uses at any time during its
To calculate the total MFIFO buffer requirement, add the largest dynamic requirement to the sum of all the
static requirements.
To avoid DMAC lockup, the total MFIFO buffer requirement of the set of channel programs must be equal
to or less than 512, the MFIFO buffer depth.
Related Information
• Watchdog Abort
DMA Controller
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on page 16-16
Resource Sharing Between DMA Channels
16-25
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