Altera Cyclone V Device Handbook page 559

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To ensure that you are using the correct GIC interrupt number, your code should refer to the symbolic interrupt

name, as shown in the Interrupt Name column. Symbolic interrupt names are defined in a header file distributed

with the source installation for your operating system.

This interrupt combines the interrupts named cpu1_parityfail_*.

Cortex-A9 Microprocessor Unit Subsystem

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Interrupt Name

cpu0_deflags4

cpu0_deflags5

cpu0_deflags6

cpu1_parityfail

cpu1_parityfail_BTAC

cpu1_parityfail_GHB

cpu1_parityfail_I_Tag

cpu1_parityfail_I_Data

cpu1_parityfail_TLB

cpu1_parityfail_D_Outer

cpu1_parityfail_D_Tag

cpu1_parityfail_D_Data

cpu1_deflags0

cpu1_deflags1

cpu1_deflags2

cpu1_deflags3

cpu1_deflags4

cpu1_deflags5

cpu1_deflags6

scu_parityfail0

scu_parityfail1

scu_ev_abort

GIC Interrupt Map for the Cyclone V SoC HPS

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