Guidelines For Ieee Std. 1149.1 Boundary-Scan Testing; Ieee Std. 1149.1 Boundary-Scan Register - Altera Cyclone V Device Handbook

CV-52009
2014.01.10

Guidelines for IEEE Std. 1149.1 Boundary-Scan Testing

Consider the following guidelines when you perform BST with IEEE Std. 1149.1 devices:
If the "10..." pattern does not shift out of the instruction register through the
clock cycle of the
try one of the following procedures:
Verify that the TAP controller has reached the
to the
Check the connections to the
Perform a
present at the device pins when you enter
in the
OUTJ
other devices in the system.
Do not perform
in-circuit reconfiguration. To perform testing, wait for the configuration to complete or issue the
CONFIG_IO
After configuration, you cannot test any pins in a differential pin pair. To perform BST after configuration,
edit and redefine the BSC group that correspond to these differential pin pairs as an internal cell.
Related Information
IEEE 1149.1 BSDL Files
Provides more information about BSC group definitions.

IEEE Std. 1149.1 Boundary-Scan Register

The boundary-scan register is a large serial shift register that uses the
as an output. The boundary-scan register consists of 3-bit peripheral elements that are associated with
Cyclone V I/O pins. You can use the boundary-scan register to test external pin connections or to capture
internal data.
JTAG Boundary-Scan Testing in Cyclone V Devices
Send Feedback
state, the TAP controller did not reach the proper state. To solve this problem,
SHIFT_IR
state, return to the
SHIFT_IR
VCC
test cycle before the first
SAMPLE/PRELOAD
update register is driven out. The state must be known and correct to avoid contention with
testing during in-circuit reconfiguration because
EXTEST
instruction to interrupt configuration.
Guidelines for IEEE Std. 1149.1 Boundary-Scan Testing
state correctly. To advance the TAP controller
SHIFT_IR
state and send the
RESET
, , , and dedicated configuration pins on the device.
GND JTAG
EXTEST
mode. If the
EXTEST
pin during the first
TDO
code to the
01100 TMS
test cycle to ensure that known data is
update register contains 0, the data
OEJ
is not supported during
EXTEST
pin as an input and the
TDI
9-9
pin.
pin
TDO
Altera Corporation