Sdram Controller Subsystem; Features Of The Sdram Controller Subsystem; Sdram Controller Subsystem Block Diagram - Altera Cyclone V Device Handbook

2013.12.30
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The hard processor system (HPS) SDRAM controller subsystem provides efficient access to external SDRAM
®
for the ARM Cortex
FPGA fabric. The SDRAM controller provides an interface between the FPGA fabric and HPS. The interface
accepts Advanced Microcontroller Bus Architecture (AMBA
®
Avalon Memory-Mapped (Avalon-MM) transactions, converts those commands to the correct commands
for the SDRAM, and manages the details of the SDRAM access.

Features of the SDRAM Controller Subsystem

The SDRAM controller subsystem offers the following features:
• Support for double data rate 2 (DDR2), DDR3, and low-power DDR2 (LPDDR2) SDRAM
• User-configurable timing parameters
• Up to 4 Gb density parts
• Two chip selects
• Integrated error correction code (ECC), 24- and 40-bit widths
• User-configurable memory width of 8, 16, 16+ECC, 32, 32+ECC
• Command reordering (look-ahead bank management)
• Data reordering (out of order transactions)
• User-controllable bank policy on a per port basis for either closed page or conditional open page accesses
• User-configurable priority support with both absolute and relative priority scheduling
• Flexible FPGA fabric interface configuration with up to 6 ports and data widths up to 256 bits wide using
Avalon-MM and AXI interfaces.
• Power management supporting self refresh, partial array self-refresh (PASR), power down, and LPDDR2
deep power down

SDRAM Controller Subsystem Block Diagram

The SDRAM controller subsystem connects to the MPU subsystem, the main switch of the L3 interconnect,
and the FPGA fabric. The memory interface consists of the SDRAM controller, the physical layer (PHY),
control and status registers (CSRs), and their associated interfaces.
The following figure shows a high-level block diagram of the SDRAM controller subsystem.
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SDRAM Controller Subsystem

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™
-A9 microprocessor unit (MPU) subsystem, the level 3 (L3) interconnect, and the
®
) Advanced eXtensible Interface (AXI
8
™
) and
ISO
9001:2008
Registered