Clocks; Resets; System Manager Address Map And Register Definitions; Document Revision History - Altera Cyclone V Device Handbook

14-8

Clocks

Clocks
The system manager is driven by a clock generated by the clock manager.
Related Information
Clock Manager

Resets

The system manager receives two reset signals from the reset manager. The sys_manager_rst_n signal
is driven on a cold or warm reset and the sys_manager_cold_rst_n signal is driven only on a cold
reset. This function allows the system manager to reset some CSR fields on either a cold or warm reset and
others only on a cold reset.
Related Information
Reset Manager

System Manager Address Map and Register Definitions

The address map and register definitions reside in the hps.html file that accompanies this handbook volume.
Click the link below to open the file.
To view the module description and base address, scroll to and click the link for the following module
instance:
• sysmgr
To then view the register and field descriptions, scroll to and click the register names. The register addresses
are offsets relative to the base address of each module instance.
Related Information
• Introduction to the Hard Processor System
The base addresses of all modules are also listed in the Introduction to the Hard Processor System chapter
in the Cyclone V Device Handbook, Volume 3.
• hps.html

Document Revision History

Table 14-2: Document Revision History
Date
December 2013
November 2012
May 2012
Altera Corporation
on page 2-1
on page 3-1
2013.12.30
1.2
1.1
Version
Maintenance release.
Minor updates.
Added functional description,
address map and register
definitions sections.
cv_54014
2013.12.30
Changes
System Manager
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