Altera Cyclone V Device Handbook page 456

Cyclone V Device Handbook Volume 3: Hard Processor System Technical Reference Manual
FPGA-to-HPS System Trace Macrocell (STM) Hardware Event Interface.......................................29-7
HPS-to-FPGA Cross-Trigger Interface..................................................................................................29-8
HPS-to-FPGA Trace Port Interface........................................................................................................29-8
FPGA-to-HPS DMA Handshake Interface............................................................................................29-8
Simulation Flows......................................................................................................................................29-10
Specifying HPS Simulation Model in Qsys..............................................................................29-10
Generating HPS Simulation Model in Qsys.............................................................................29-13
Running the Simulation..............................................................................................................29-13
Document Revision History...................................................................................................................29-17
Booting and Configuration Introduction..........................................................A-1
HPS Boot......................................................................................................................................................A-3
Boot Process Overview...................................................................................................................A-3
Boot ROM........................................................................................................................................A-5
HPS State on Entry to the Preloader..........................................................................................A-11
Preloader........................................................................................................................................A-12
Flash Memory Devices.................................................................................................................A-14
FPGA Configuration................................................................................................................................A-22
Full Configuration........................................................................................................................A-22
Document Revision History....................................................................................................................A-24
TOC-17
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