Low Latency Custom Configuration Channel Options - Altera Cyclone V Device Handbook

CV-53005
2013.05.06
Figure 5-7: Datapath in Low Latency Custom Configuration
Transmitter PMA
Serial
Clock
Receiver PMA
Parallel Clock
The maximum supported data rate varies depending on the customization and is identical to the custom
configuration except that the 8B/10B block is disabled

Low Latency Custom Configuration Channel Options

There are multiple channel options when you use Low Latency Custom Configuration.
In the following figures:
• The blocks shown as "Disabled" are not used but incur latency.
• The blocks shown as "Bypassed" are not used and do not incur any latency.
• The transmitter bit-slip is disabled.
Transceiver Custom Configurations in Cyclone V Devices
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Transmitter PCS
Receiver PCS
Low Latency Custom Configuration Channel Options
/2
/2
FPGA Fabric
tx_parallel data
tx_coreclkin
tx_clkout
rx_parallel data
rx_coreclkin
rx_clkout
Serial Clock
The serial and parallel clocks are
Parallel Clock sourced from the clock divider.
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5-7