Pull-Up Resistor; On-Chip I/O Termination In Cyclone V Devices; R Soct Without Calibration In Cyclone V Devices; R Soct With Calibration In Cyclone V Devices - Altera Cyclone V Device Handbook

5-34

Pull-up Resistor

The bus-hold circuitry uses a resistor with a nominal resistance (R
the signal level to the last-driven state of the pin. The bus-hold circuitry holds this pin state until the next
input signal is present. Because of this, you do not require an external pull-up or pull-down resistor to hold
a signal level when the bus is tri-stated.
For each I/O pin, you can individually specify that the bus-hold circuitry pulls non-driven pins away from
the input threshold voltage—where noise can cause unintended high-frequency switching. To prevent over-
driving signals, the bus-hold circuitry drives the voltage level of the I/O pin lower than the V
If you enable the bus-hold feature, you cannot use the programmable pull-up option. To configure the I/O
pin for differential signals, disable the bus-hold feature.
Pull-up Resistor
Each I/O pin provides an optional programmable pull-up resistor during user mode. The pull-up resistor
weakly holds the I/O to the V
The Cyclone V device supports programmable weak pull-up resistors only on user I/O pins but not on
dedicated configuration pins, dedicated clock pins, or JTAG pins .
If you enable this option, you cannot use the bus-hold feature.

On-Chip I/O Termination in Cyclone V Devices

Dynamic R and R
S
signal quality, saves board space, and reduces external component costs.
The Cyclone V devices support OCT in all FPGA I/O banks. For the HPS I/Os, the column I/Os do not
support OCT.
Table 5-28: OCT Schemes Supported in Cyclone V Devices
Direction
Output
Input
Bidirectional
Related Information
R OCT without Calibration in Cyclone V Devices
S
R OCT with Calibration in Cyclone V Devices
S
R OCT with Calibration in Cyclone V Devices
T
LVDS Input R
Altera Corporation
level.
CCIO
OCT provides I/O impedance matching and termination capabilities. OCT maintains
T
R OCT with calibration
S
R OCT without calibration
S
R OCT with calibration
T
R OCT (LVDS and SLVS
D
I/O standards only)
Dynamic R
OCT in Cyclone V Devices
D
BH
OCT Schemes
OCT and R
S T
OCT
on page 5-35
on page 5-36
on page 5-38
on page 5-41
), approximately 7 kΩ, to weakly pull
CCIO
Supported in HPS Row I/Os
Yes
Yes
Yes
—
Yes
I/O Features in Cyclone V Devices
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CV-52005
2014.01.10
level.