CV-52003
2014.01.10
Date
June 2012
May 2011
Variable Precision DSP Blocks in Cyclone V Devices
Send Feedback
Version
2.0
Updated for the Quartus II software v12.0 release:
Restructured chapter.
Added "Design Considerations", "Adder", and "Double Accumulation
Register" sections.
Updated Figure 3–1 and Figure 3–13.
Added Table 3–3.
Updated "Systolic Registers" and "Systolic FIR Mode" sections.
Added Equation 3–2.
Added Figure 3–12.
1.0
Initial release.
Document Revision History
Changes
3-19
Altera Corporation