Altera Cyclone V Device Handbook page 462

Hide thumbs Also See for Cyclone V:
Table of Contents

Advertisement

1-6
NAND Flash Controller
NAND Flash Controller
The NAND flash controller is based on the Cadence
offers the following features:
• Supports single-level cell (SLC) and multilevel cell (MLC) NAND flash devices
• Integrated descriptor-based DMA controller
• 8-bit ONFI 1.0 NAND flash devices
• Programmable page sizes of 512 bytes, 2 KB, 4 KB, and 8 KB
• Supports 32, 64, 128, 256, 384, and 512 pages per block
• Programmable hardware ECC for SLC and MLC devices
• 512-byte ECC sector size with 4-, 8-, or 16-bit correction
• 1 KB ECC sector size with 24-bit correction
Related Information
NAND Flash Controller
Quad SPI Flash Controller
The quad SPI flash controller is based on Cadence Quad SPI Flash Controller and offers the following
features:
• Supports SPIx1, SPIx2, or SPIx4 (quad SPI) serial NOR flash devices
• Supports direct access and indirect access modes.
• Supports single I/O, dual I/O, quad I/O instructions
• Programmable data frame size of 8, 16, or 32 bits
• Support up to four chip selects
Related Information
Quad SPI Flash Controller
SD/MMC Controller
The SD/MMC controller is based on Synopsys
following features:
• Integrated descriptor-based DMA
• Supports CE-ATA digital protocol commands
• Supports single card
• Single data rate (SDR) mode only
• Programmable card width: 1-, 4-, and 8-bit
• Programmable card types: SD, SDIO, or MMC version 4.3 and 4.4 devices
• Up to 64 KB programmable block size
Note:
For an inclusive list of the programmable card types versions supported, refer to the SD/MMC
Controller chapter.
Related Information
SD/MMC Controller
Altera Corporation
on page 10-1
on page 12-1
®
on page 11-1
®
®
Design IP
NAND Flash Memory Controller and
®
DesignWare
Mobile Storage Host controller and offers the
Introduction to Cyclone V Hard Processor System (HPS)
cv_54001
2013.12.30
Send Feedback

Advertisement

Table of Contents
loading

Table of Contents