Altera Cyclone V Device Handbook page 747

cv_54011
2013.12.30
If internal DMA controller mode is used for the boot process, the controller performs the following
steps after the Boot ACK Received timeout:
• The DMA descriptor is closed.
• The ces bit in the idsts register is set to 1, indicating Boot Data Start timeout.
• The ri bit of the idsts register is not set.
c. If the Boot Data Start interrupt is received, it indicates that the boot data is being received from the
card device. When the DMA engine is not in internal DMA controller mode, the software driver can
then initiate a data read from the controller based on the rxdr interrupt bit in the rintsts register.
In internal DMA controller mode, the DMA engine starts transferring the data from the FIFO buffer
to the system memory as soon as the level specified in the rx_wmark field of the fifoth register
is reached.
d. The software driver must terminate the boot process by instructing the controller to send the SD/SDIO
GO_IDLE_STATE command:
• Reset the cmdarg register to 0.
• Set the start_cmd bit of the cmd register to 1, and all other bits to 0.
e. At the end of a successful boot data transfer from the card, the following interrupts are generated:
• The cmd bit and dto bit in the rintsts register
• The ri bit in the idsts register, in internal DMA controller mode only
f. If an error occurs in the boot ACK pattern (0b010) or an EBE occurs:
• The controller does not generate a Boot ACK Received interrupt.
• The controller detects Boot Data Start and generates a Boot Data Start interrupt.
• The controller continues to receive boot data.
• The application must abort the boot process after receiving a Boot Data Start interrupt.
g. In internal DMA controller mode:
• If the software driver creates more descriptors than required by the received boot data, the extra
descriptors are not closed by the controller.
• If the software driver creates fewer descriptors than required by the received boot data, the controller
generates a Descriptor Unavailable interrupt and does not transfer any further data to system
memory.
h. If N
is an error associated with the start or end bit, the SBE or EBE interrupt is also generated.
The alternative boot operation for eMMC card devices is complete. Do not execute the remaining steps
(15 and 16).
15. Wait for the Command Done interrupt.
16. This step handles the case where a start-acknowledge pattern is not expected (expect_boot_ack was
set to 0 in
a. If the Boot Data Start interrupt is not received from the controller within 1 second of initiating the
command
discovery.
SD/MMC Controller
Send Feedback
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is violated between data block transfers, a DRTO interrupt is asserted. Apart from this, if there
AC
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step 11).
(step 11), the software driver must discontinue the boot process and start with normal
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In internal DMA controller mode:
Alternative Boot Operation for eMMC Card Devices
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Altera Corporation
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