Ce-Ata Data Transfer Commands - Altera Cyclone V Device Handbook

11-50

CE-ATA Data Transfer Commands

3. If the card supports the read_wait signal, assert it by setting the read wait bit (read_wait) in the
ctrl register to 1.
4. Reset the read_wait bit to 0 in the ctrl register.
CE-ATA Data Transfer Commands
This section describes CE-ATA data transfer commands.
For information about the basic settings and interrupts generated for different conditions, refer to Data
Transfer Commands.
Related Information
Data Transfer Commands
Refer to this section for information about the basic settings and interrupts generated for different conditions.
Reset and Card Device Discovery Overview
Before starting any CE-ATA operations, the host must perform a MMC reset and initialization procedure.
The host and card device must negotiate the MMC transfer (MMC TRAN) state before the card enters the
MMC TRAN state.
For information about the MMC TRAN state, MMC reset and initialization, refer to JEDEC Standard No.
84-A441, available on the JEDEC website.
The host must follow the existing MMC discovery procedure to negotiate the MMC TRAN state. After
completing normal MMC reset and initialization procedures, the host must query the initial ATA task file
values using the RW_REG or CMD39 command.
By default, the MMC block size is 512 bytes indicated by bits 1:0 of the srcControl register inside the CE-
ATA card device. The host can negotiate the use of a 1 KB or 4 KB MMC block sizes. The card indicates
MMC block sizes that it can support through the srcCapabilities register in the MMC; the host reads this
register to negotiate the MMC block size. Negotiation is complete when the host controller writes the MMC
block size into the srcControl register bits 1:0 of the card.
Related Information
www.jedec.org
For information about the (MMC TRAN) state, MMC reset and initialization, refer to JEDEC Standard No.
84-A441, available on the JEDEC website.
ATA Task File Transfer Overview
ATA task file registers are mapped to addresses 0x00h through 0x10h in the MMC register space. The
RW_REG command is used to issue the ATA command, and the ATA task file is transmitted in a single
RW_REG MMC command sequence.
The host software stack must write the task file image to the FIFO buffer before setting the cmdarg and
cmd registers in the controller. The host processor then writes the address and byte count to the cmdarg
register before setting the cmd register bits.
For the RW_REG command, there is no CCS from the CE-ATA card device.
Altera Corporation
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2013.12.30
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SD/MMC Controller
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