Altera Cyclone V Device Handbook page 837

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2013.12.30
Figure 16-22: DMAWFE Instruction Encoding
Assembler syntax
DMAWFE <event_num>[, invalid]
where:
<event_num> 5-bit immediate, value 0-31
[invalid] Sets i to 1. If invalid is present, the DMAC invalidates the instruction cache for the current
DMA thread. If invalid is not present, then the assembler sets i to 0 and the DMAC does not invalidate
the instruction cache for the current DMA.
• The DMAC aborts the thread if you select an event number that is not available for your configuration
of the DMAC. To ensure cache coherency, you must use invalid when a processor writes the
instruction stream for a DMA channel.
Operation
You can use the instruction with the DMA manager thread and the DMA channel thread.
Related Information
Using Events and Interrupts
DMAWFP
Wait For Peripheral instructs the DMAC to halt execution of the thread until the specified peripheral signals
a DMA request for that DMA channel.
Figure 16-23: DMAWFP Instruction Encoding
Assembler syntax
DMAWFP <peripheral>, <single|burst|periph>
where:
<peripheral> 5-bit immediate, value 0-31
Note: The DMAC aborts the thread if you select a peripheral number that is not available.
<single> Sets bs to 0 and p to 0. This instructs the DMAC to continue executing the DMA channel
thread after it receives a single or burst DMA request. The DMAC sets the request_type to Single, for
that DMA channel.
<burst> Sets bs to 1 and p to 0. This instructs the DMAC to continue executing the DMA channel thread
after it receives a burst DMA request. The DMAC sets the request_type to Burst.
DMA Controller
Send Feedback
15 11 10 9 8 7 6
event_num[4:0] 0 i 0 0 0
on page 16-14
15 11 10 9 8 7 6 5 4 3 2 1 0
peripheral[4:0]
0 0 0 0 0
5 4 3 2 1 0
1 1 0 1 1 0
p
1 1 0 0 bs
16-41
DMAWFP
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