Spi Controller; Features Of The Spi Controller; Spi Block Diagram And System Integration - Altera Cyclone V Device Handbook

2013.12.30
cv_54019 Subscribe
The hard processor system (HPS) provides two serial peripheral interface (SPI) masters and two SPI slaves.
The SPI masters and slaves are instances of the Synopsys
controller (DW_apb_ssi).
Note: Portions
are registered trademarks of Synopsys, Inc. All documentation is provided "as is" and without any
warranty. Synopsys expressly disclaims any and all warranties, express, implied, or otherwise, including
the implied warranties of merchantability, fitness for a particular purpose, and non-infringement,
and any warranties arising out of a course of dealing or usage of trade.
†Paragraphs marked with the dagger (†) symbol are Synopsys Proprietary. Used with permission.

Features of the SPI Controller

The SPI controller has the following features: †
• Serial master and serial slave controllers – Enable serial communication with serial-master or serial-slave
peripheral devices. †
• Serial interface operation – Programmable choice of the following protocols:
• Motorola SPI protocol
• Texas Instruments Synchronous Serial Protocol
• National Semiconductor Microwire
• DMA controller interface integrated with HPS DMA controller
• SPI master supports rxd sample delay
• Transmit and receive FIFO buffers are 256 words deep
• SPI master supports up to four slave selects
• Programmable master serial bit rate
• Programmable data item size of 4 to 16 bits

SPI Block Diagram and System Integration

The SPI supports data bus widths of 32 bits. †
2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words
and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other
words and logos identified as trademarks or service marks are the property of their respective holders as described at
www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with
Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes
no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly
agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published
information and before placing orders for products or services.
www.altera.com
101 Innovation Drive, San Jose, CA 95134
Send Feedback
©
2013 Synopsys, Inc. Used with permission. All rights reserved. Synopsys & DesignWare

SPI Controller

® ®
DesignWare Synchronous Serial Interface (SSI)
19
ISO
9001:2008
Registered