Altera Cyclone V Device Handbook page 889

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17-40
Transmit Descriptor
Bit
15
ES: Error Summary
Indicates the logical OR of the following bits:
■ TDES0[14]: Jabber Timeout
■ TDES0[13]: Frame Flush
■ TDES0[11]: Loss of Carrier
■ TDES0[10]: No Carrier
■ TDES0[9]: Late Collision
■ TDES0[8]: Excessive Collision
■ TDES0[2]: Excessive Deferral
■ TDES0[1]: Underflow Error
■ TDES0[16]: IP Header Error
■ TDES0[12]: IP Payload Error
14
JT: Jabber Timeout
When set, this bit indicates the MAC transmitter has experienced a jabber time-out. This
bit is only set when Bit 22 (Jabber Disable) of Register 0 (MAC Configuration Register) is
not set.
13
FF: Frame Flushed
When set, this bit indicates that the DMA or MTL flushed the frame because of a software
Flush command given by the CPU.
12
IPE: IP Payload Error
When set, this bit indicates that MAC transmitter detected an error in the TCP, UDP, or
ICMP IP datagram payload. The transmitter checks the payload length received in the IPv4
or IPv6 header against the actual number of TCP, UDP, or ICMP packet bytes received
from the application and issues an error status in case of a mismatch.
11
LC: Loss of Carrier
When set, this bit indicates that a loss of carrier occurred during frame transmission (that
is, the gmii_crs_i signal was inactive for one or more transmit clock periods during frame
transmission). This is valid only for the frames transmitted without collision when the MAC
operates in the half-duplex mode.
10
NC: No Carrier
When set, this bit indicates that the Carrier Sense signal form the PHY was not asserted
during transmission.
9
Reserved
Altera Corporation
Description
Ethernet Media Access Controller
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cv_54017
2013.12.30

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