Altera Cyclone V Device Handbook page 421

5-4
Custom Configuration Channel Options
Figure 5-4: Configuration Options for Custom Single-Width Mode (10-bit PMA PCS Interface Width)
Word Aligner (Pattern Length)
8B/10B Encoder/Decoder
Rate Match FIFO
Byte SERDES
FPGA Fabric–Transceiver
Interface Width
Data Rate (Gbps)
Figure 5-5: Configuration Options for Custom Double-Width Mode (16-bit PMA PCS Interface Width)
Altera Corporation
Manual Alignment
or Bit-Slip
Disabled Enabled
Disabled Disabled
Disabled Enabled Disabled
10-Bit 20-Bit 8-Bit
GX/SX= 3.125
1.875 1.875
GT/ST= 3.75
Word Aligner (Pattern Length)
8B/10B Encoder/Decoder
Rate Match FIFO
Byte SERDES
Disabled
FPGA Fabric–Transceiver
16-Bit
Interface Width
Data Rate (Gbps)
2.62144
Automatic Synchronization
State Machine
Disabled
Enabled/
Disabled
Enabled Disabled Enabled Disabled
16-Bit 10-Bit 20-Bit 8-Bit
GX/SX= 3.125
3.125 1.875 1.875
GT/ST= 3.75
Manual Alignment
or Bit-Slip
Disabled
Disabled
Enabled
32-Bit
GX/SX= 3.125
GT/ST= 5
Transceiver Custom Configurations in Cyclone V Devices
Enabled
Enabled/
Disabled
Enabled
16-Bit
3.125
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CV-53005
2013.05.06