Nand Flash Controller; Nand Flash Controller Features; Nand Flash Controller Block Diagram And System Integration - Altera Cyclone V Device Handbook

2013.12.30
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The hard processor system (HPS) provides a NAND flash controller to interface with external NAND flash
memory in Altera
processor boot image, software, or as extra storage capacity for large applications or user data. The HPS
NAND flash controller is based on the Cadence

NAND Flash Controller Features

The NAND flash controller provides the following functionality and features:
• Supports one x8 NAND flash device
• Supports Open NAND Flash Interface (ONFI) 1.0
• Supports NAND flash memories from Hynix, Samsung, Toshiba, Micron, and ST Micro
• Supports programmable 512 byte (4-, 8-, or 16-bit correction) or 1024 byte (24-bit correction) error
correction code (ECC) sector size
• Supports pipeline read-ahead and write commands for enhanced read/write throughput
• Supports devices with 32, 64, 128, 256, 384, or 512 pages per block
• Supports multiplane devices
• Supports page sizes of 512 bytes, 2 kilobytes (KB), 4 KB, or 8 KB
• Supports single-level cell (SLC) and multi-level cell (MLC) devices with programmable correction
capabilities
• Provides internal direct memory access (DMA)
• Provides programmable access timing

NAND Flash Controller Block Diagram and System Integration

The following figure shows integration of the NAND flash controller in the HPS. The flash controller receives
commands and data from the host through the command and data slave interface. The host accesses the
flash controller's control and status registers (CSRs) through the register slave interface. The flash controller
handles all command sequencing and flash device interactions. The bootstrap interface supports configuration
of the NAND flash controller when booting the HPS from NAND flash memory. The flash controller
generates interrupts to the HPS Cortex
master interface provides accesses to and from the flash controller through the controller's built-in DMA.
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system-on-a-chip (SoC) FPGA systems. You can use external flash memory to store a
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-A9 MPCore

NAND Flash Controller

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Design IP NAND Flash Memory Controller.
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processor generic interrupt controller. The DMA
10
ISO
9001:2008
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