Board Settings Dip Switch; Jtag Chain Control Dip Switch; Pci Express Link Width Dip Switch - Altera Arria V GX Reference Manual

2–18

Board Settings DIP Switch

Table 2–11. Board Settings DIP Switch Controls
Switch Schematic Signal Name
1
CLK_SEL
2
CLK_EN
3
FACTORY_LOAD
4
SECURITY

JTAG Chain Control DIP Switch

Table 2–12. JTAG Chain Control Switch
Switch Schematic Signal Name
1
5M2210_JTAG_EN
2
HSMA_JTAG_EN
3
PCIE_JTAG_EN
4
NC

PCI Express Link Width DIP Switch

Table 2–13. PCI Express Link Width DIP Switch Controls (Part 1 of 2)
Switch Schematic Signal Name
1
PCIE_PRSNT2n_x1
2
PCIE_PRSNT2n_x4
Arria V GX Starter Board
Reference Manual
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The board settings DIP switch (SW4) controls various features specific to the board
and the MAX V CPLD 5M2210 System Controller logic design.
switch controls and descriptions.
ON: Select SMA input clock
OFF: Select programmable oscillator clock
ON: Disable On-board oscillator
OFF: Enable On-board oscillator
ON: Load the user design from flash at power up.
OFF: Load the factory design from flash for Arria V at power up.
Reserved for future use.
The JTAG chain control DIP switch (SW2) either remove or include devices in the
active JTAG chain. The Arria V GX is always in the JTAG chain.
switch controls and its descriptions.
ON : Bypass MAX V CPLD 5M2210 System Controller
OFF : MAX V CPLD 5M2210 System Controller in-chain
ON : Bypass HSMA
OFF : HSMA in-chain
ON : Bypass PCI Express edge connector
OFF : PCI Express edge connector in-chain
Not used
The PCI Express link width DIP switch (SW1) enable or disable different link width
configurations. Table 2–13
ON : Enable x1 presence detect
OFF : Disable x1 presence detect
ON : Enable x4 presence detect
OFF : Disable x4 presence detect
Description
Description
lists the switch controls and descriptions.
Description
Chapter 2: Board Components
Setup Elements
Table 2–11 lists the
Default
OFF
OFF
OFF
OFF
Table 2–12 lists the
Default
OFF
ON
ON
ON
Default
ON
ON
September 2015 Altera Corporation