Altera Cyclone V Device Handbook page 553

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2013.12.30
The preload functionality is under software control. The following PLE control parameters must be
programmed:
• Programmed parameters, including the following:
• Base address
• Length of stride
• Number of blocks
• A valid bit
• TrustZone memory protection for the cache memory, with an NS (non-secure) state bit
• A translation table base (TTB) address
• An Address Space Identifier (ASID) value
For more information about the PLE, refer to the Preload Engine chapter of the Cortex-A9 Technical Reference
Manual, available on the ARM website (infocenter.arm.com).
Related Information
ARM Infocenter (www.infocenter.arm.com)
Floating Point Unit
Each ARM Cortex-A9 processor includes full support for IEEE-754 floating point operations. The floating-
point unit (FPU) fully supports half-, single-, and double-precision variants of the following operations:
• Add
• Subtract
• Multiply
• Divide
• Multiply and accumulate (MAC)
• Square root
The FPU also converts between floating-point data formats and integers, including special operations to
round towards zero required by high-level languages.
NEON Multimedia Processing Engine
The NEON multimedia processing engine (MPE) provides hardware acceleration for media and signal
processing applications. Each ARM Cortex-A9 processor includes an ARM NEON MPE that supports SIMD
processing.
Cortex-A9 Microprocessor Unit Subsystem
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Floating Point Unit
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