Altera Cyclone V Device Handbook page 77

4-20
PLL Locations in Cyclone V Devices
Figure 4-20: PLL Locations for Cyclone V E A9 Device, Cyclone V GX C9 Device, and Cyclone V GT D9 Device
This figure represents the top view of the silicon die that corresponds to a reverse view of the device package.
Altera Corporation
CLK[8..11][p,n]
4 Logical Clocks
4
FRACTIONALPLL_X0_Y108
PLL Strip
4
FRACTIONALPLL_X0_Y81
4
FRACTIONALPLL_X0_Y64
4
FRACTIONALPLL_X0_Y39
4
FRACTIONALPLL_X0_Y22
4
FRACTIONALPLL_X0_Y1
4
CLK[0..3][p,n]
Pins
CLK[10,11]
FRACTIONALPLL_X121_Y108
FRACTIONALPLL_X121_Y1
Logical Clocks
CLK[2,3]
Pins
2 Logical Clocks
2
4
Pins
Logical
CLK[4..5][p,n]
Clocks
4 2
Pins
Logical
CLK[6..7][p,n]
Clocks
2 Logical
Clocks
Clock Networks and PLLs in Cyclone V Devices
CV-52004
2014.01.10
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