Writing A Predefined Data Pattern To Sdram In The Preloader - Altera Cyclone V Device Handbook

cv_54008
2013.12.30
• Consider the following example of latency results:
SEQ.C: LFIFO Calibration ; Latency 10
Analysis of latency results: This is the calibrated PHY read latency. The EMIF Debug Toolkit does not
report this figure. This latency is reported in clock cycles.
• Consider the following example of FOM results:
SEQ.C: FOM IN
SEQ.C: FOM OUT = 91
Analysis of FOM results: The FOM IN value is a measure of the health of the read interface; it is calculated
as the sum over all groups of the minimum margin on DQ plus the margin on DQS, divided by 2. The
FOM OUT is a measure of the health of the write interface; it is calculated as the sum over all groups of
the minimum margin on DQ plus the margin on DQS, divided by 2. You may refer to these values as
indicators of improvement when you are experimenting with various termination schemes, assuming
there are no individual misbehaving DQ pins.
• The debug report does not provide delay chain step size values. The delay chain step size varies with
device speed grade. Refer to your device data sheet for exact incremental delay values for delay chains.
Related Information
Functional Description UniPHY

Writing a Predefined Data Pattern to SDRAM in the Preloader

You can include your own code to write a predefined data pattern to the SDRAM in the preloader for
debugging purposes.
1. Include your code in the following file: <project_folder>\
socfpga
For example, adding the following code to the
and walking 0s, repeated five times, to the SDRAM.
/*added for demo, place after the last #define statement in spl.c */
#define ROTATE_RIGHT(X) ( (X>>1) | (X&1?0X80000000:0) )
/*added for demo, place after the calibration code */
test_data_walk0((long *)0x100000,PHYS_SDRAM_1_SIZE);
int test_data_walk0(long *base, long maxsize)
{
volatile long *addr;
long
ulong
ulong
SDRAM Controller Subsystem
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= 83
\ \ \ \ \
arch arm cpu armv7 socfpga
cnt;
data_temp[3];
ulong expected_data[3];
read_data;
int i = 0;
int num_address;
num_address=50;
data_temp[0]=0XFFFFFFFE; //initial data for walking 0 pattern
data_temp[1]=0X00000001; //initial data for walking 1 pattern
Writing a Predefined Data Pattern to SDRAM in the Preloader
software
\ .
spl.c
file would cause the controller to write walking 1s
spl.c
//counter to loop different data pattern
\ \
spl_bsp uboot-
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