Quad Spi Flash Controller Block Diagram And System Integration - Altera Cyclone V Device Handbook

12-2

Quad SPI Flash Controller Block Diagram and System Integration

Quad SPI Flash Controller Block Diagram and System Integration
Figure 12-1: Quad SPI Flash Controller Block Diagram and System Integration
DMA
Controller
System
Manager
L3
Interconnect
The quad SPI controller consists of the following blocks and interfaces:
• Register slave interface Slave interface that provides access to the control and status registers (CSRs)
• Data slave controller Slave interface and controller that provides the following functionality:
• Performs data transfers to and from the level 3 (L3) interconnect
• Validates incoming accesses
• Performs byte or half-word reordering
• Performs write protection
• Forwards transfer requests to direct and indirect controller
• Direct access controller provides memory-mapped slaves direct access to the flash memory
• Indirect access controller provides higher-performance access to the flash memory through local
buffering and software transfer requests
• Software triggered instruction generator (STIG) generates flash commands through the flash command
register (flashcmd) and provides low-level access to flash memory
• Flash command generator generates flash command and address instructions based on instructions
from the direct and indirect access controllers or the STIG
• DMA peripheral request controller issues requests to the DMA peripheral request interface to
communicate with the external DMA controller
• SPI PHY serially transfers data and commands to the external SPI flash devices
Altera Corporation
Quad SPI Flash Controller
DMA
DMA Peripheral
Peripheral
Request Request Controller
Interface
ECC
Indirect
Signals
SRAM Access
Controller
Direct
Access
Controller
Data Slave Data Slave
Interface Controller
Register Slave Interface
L4 Peripheral Bus
Flash
Command
Generator
STIG
CSRs
SPI PHY
TX
FIFO
RX
FIFO
SPI Flash
Device
Interface
SPI
Control
Logic
Quad SPI Flash Controller
Send Feedback
cv_54012
2013.12.30